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 Fiber Optics
V23848-N15-C656 iSFPTM - Intelligent Small Form-factor Pluggable SONET OC-48 IR-1 / SDH STM S-16.1 Multirate Applications up to 2.67 Gbit/s Single Mode 1300 nm Transceiver with LCTM Connector
Preliminary Data Sheet Features * Small Form-factor Pluggable (SFP) MSA compatible transceiver1) * Fully SFF-8472 compatible * Incorporating Intelligent - Digital Diagnostic Monitoring Interface * Internal calibration implementation * Advanced release mechanism File: 1132 * Easy access, even in belly to belly applications * Wire handle release for simplicity * Color coded blue tab (single mode) * PCI height compatible * Excellent EMI performance * Common ground concept * RJ-45 style LCTM connector system * Single power supply (3.3 V) * Low power consumption * Small size for high channel density File: 1133 * UL-94 V-0 certified * ESD Class 1C per JESD22-A114-B (MIL-STD 883D Method 3015.7) * According to FCC (Class B) and EN 55022 * For distances of up to 15 km * Uncooled DFB laser, PIN photo diode * Laser safety according to Class 1 FDA and IEC * AC/AC Coupling according to MSA * Suitable for multirate applications up to 2.67 Gbit/s * Extended operating temperature range of -40C to 85C * SFP evaluation kit V23848-S5-V4 available upon request * A press fit cage and cage plugs are available as accessory products from Infineon (see SFP Accessories)
1)
MSA documentation can be found at www.infineon.com/fiberoptics under Transceivers, SFP Transceivers.
iSFPTM is a trademark of Infineon Technologies. LCTM is a trademark of Lucent.
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Pin Configuration Pin Configuration
20 19 18 17 16 15 14 13 12 11
VEET TD- TD+ VEET VCCT VCCR VEER RD+ RD- VEER
1 2 3 4 5 6 7 8 9 10
VEET Tx Fault Tx Disable MOD-DEF(2) MOD-DEF(1) MOD-DEF(0) Rate Select LOS VEER VEER
Top of transceiver
Bottom of transceiver (as viewed through top of transceiver)
File: 1306
Figure 1
iSFPTM Transceiver Electrical Pad Layout
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Pin Configuration Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1) 2) 3) 4) 5) 6) 7)
Name
Logic Level N/A LVTTL LVTTL LVTTL LVTTL N/A N/A LVTTL N/A N/A N/A LVPECL LVPECL N/A N/A N/A N/A LVPECL LVPECL N/A
Function Transmitter Ground1) Transmitter Fault Indication2) 8) Transmitter Disable3) Module Definition 24) 8) Module Definition 15) 8) Module Definition 06) 8) Not connected Loss Of Signal7) 8) Receiver Ground1) Receiver Ground1) Receiver Ground1) Inv. Received Data Out9) Received Data Out9) Receiver Ground1) Receiver Power Transmitter Power Transmitter Ground1) Transmit Data In10) Inv. Transmit Data In10) Transmitter Ground1)
VEET
Tx Fault Tx Disable MOD-DEF(2) MOD-DEF(1) MOD-DEF(0) Rate Select LOS
VEER VEER VEER
RD- RD+
VEER VCCR VCCT VEET
TD+ TD-
VEET
8) 9) 10)
Common transmitter and receiver ground within the module. A high signal indicates a laser fault of some kind and that laser is switched off. A low signal switches the transmitter on. A high signal or when not connected switches the transmitter off. MOD-DEF(2) is the data line of two wire serial interface for serial ID. MOD-DEF(1) is the clock line of two wire serial interface for serial ID. MOD-DEF(0) is grounded by the module to indicate that the module is present. A low signal indicates normal operation, light is present at receiver input. A high signal indicates the received optical power is below the worst case receiver sensitivity. Should be pulled up on host board to VCC by 4.7 - 10 k. AC coupled inside the transceiver. Must be terminated with 100 differential at the user SERDES. AC coupled and 100 differential termination inside the transceiver.
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Description Description The Infineon OC-48 transceiver - part of Infineon iSFPTM family - is compatible to the Physical Medium Depend (PMD) sublayer and baseband medium compatible to SONET OC-48 IR-1 (Telcordia GR-253-CORE) and SDH STM-16 S-16.1 (ITU-T G.957). The appropriate fiber optic cable is 9 m single mode fiber with LCTM connector. Supported Link Lengths Category within Standard min. SDH STM-16 S-16.1 SONET OC-48 IR-1
1)
Reach max.1) 15,000 21,000 0 0
Unit meters
Maximum reach over fiber type SM-G.652 as defined by ITU-T G.957 and Telcordia GR-253-CORE standards. Longer reach possible depending upon link implementation.
The Infineon iSFPTM single mode transceiver is a single unit comprised of a transmitter, a receiver, and an LCTM receptacle. This transceiver supports the LCTM connectorization concept. It is compatible with RJ-45 style backpanels for high end datacom and telecom applications while providing the advantages of fiber optic technology. The Infineon single mode OC-48 transceiver is a single unit comprised of a transmitter, a receiver, and an LC receptacle. This design frees the customer from many alignment and PC board layout concerns. The module is designed for low cost LAN and up to 2.67 Gbit/s applications. It can be used as the network end device interface in workstations, servers, and storage devices, and in a broad range of network devices such as bridges, routers, and intelligent hubs, as well as local and wide area ATM switches. This transceiver operates at OC-48 speed from a single power supply (+3.3 V). The 100 differential data inputs and outputs are LVPECL and CML compatible.
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Description Functional Description of iSFPTM Transceiver This transceiver is designed to transmit serial data via single mode cable.
Tx Fault Automatic Shut-Down Tx Disable Tx Coupling Unit TD+ TD- Laser Driver e/o Laser
Power Control Monitor
o/e Single Mode Fiber Rx Coupling Unit
RD+ RD- LOS MOD-DEF(2) MOD-DEF(1) Digital Diagnostic Monitoring Interface EEPROM Limiting Amp TIA o/e
Alarm and Warning Flags
File: 1354
Figure 2
Functional Diagram
The receiver component converts the optical serial data into LVPECL compatible electrical data (RD+ and RD-). The Loss Of Signal (LOS) shows whether an optical signal is present. The transmitter converts LVPECL compatible electrical serial data (TD+ and TD-) into optical serial data. Data lines are differentially 100 terminated. The transmitter contains a laser driver circuit that drives the modulation and bias current of the laser diode. The currents are controlled by a power control circuit to guarantee constant output power of the laser over temperature and aging. The power control uses the output of the monitor PIN diode (mechanically built into the laser coupling unit) as a controlling signal, to prevent the laser power from exceeding the operating limits. Single fault condition is ensured by means of an integrated automatic shutdown circuit that disables the laser when it detects laser fault to guarantee the laser Eye Safety.
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Description The transceiver contains a supervisory circuit to control the power supply. This circuit makes an internal reset signal whenever the supply voltage drops below the reset threshold. It keeps the reset signal active for at least 140 milliseconds after the voltage has risen above the reset threshold. During this time the laser is inactive. A low signal on TxDis enables transmitter. If TxDis is high or not connected the transmitter is disabled. An enhanced Digital Diagnostic Monitoring Interface (Intelligent) has been incorporated into the Infineon Small Form-factor Pluggable (SFP) transceiver. This allows real time access to transceiver operating parameters, based on the SFF-8472. This transceiver features Internal Calibration. Measurements are calibrated over operating temperature and voltage and must be interpreted as defined in SFF-8472. The transceiver generates this diagnostic data by digitization of internal analog signals monitored by a new diagnostic Integrated Circuit (IC). This diagnostic IC has inbuilt sensors to include alarm and warning thresholds. These threshold values are set during device manufacture and therefore allow the user to determine when a particular value is outside of its operating range. Alarm and Warning Flags are given. Alarm Flags indicate conditions likely to be associated with an inoperational link and cause for immediate action. Warning Flags indicate conditions outside the normally guaranteed bounds but not necessarily causes of immediate link failures. These enhanced features are in addition to the existing SFP features provided by the manufacturer i.e. serial number and other vendor specific data. The serial ID interface defines a 256 byte memory map in EEPROM, accessible over a 2 wire, serial interface at the 8 bit address 1010000X (A0h). The Digital Diagnostic Monitoring Interface makes use of the 8 bit address 1010001X (A2h), so the originally defined serial ID memory map remains unchanged and is therefore backward compatible. Digital Diagnostic Monitoring Parameters Parameter Tx Optical Power Rx Optical Power Bias Current Power Supply Voltage Transceiver Temperature Accuracy SFF-8472 3 dB 3 dB 10% 3% 3C Accuracy Actual 1.5 dB 2 dB 10% 3% 3C
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Description Regulatory Compliance (EMI) Feature ESD: Electrostatic Discharge to the Electrical Pins Immunity: Against Electrostatic Discharge (ESD) to the Duplex LC Receptacle Immunity: Against Radio Frequency Electromagnetic Field Standard EIA/JESD22-A114-B (MIL-STD 883D method 3015.7) EN 61000-4-2 IEC 61000-4-2 Comments Class 1C
Discharges ranging from 2 kV to 15 kV on the receptacle cause no damage to transceiver (under recommended conditions). With a field strength of 10 V/m, noise frequency ranges from 10 MHz to 2 GHz. No effect on transceiver performance between the specification limits. Noise frequency range: 30 MHz to 18 GHz
EN 61000-4-3 IEC 61000-4-3
Emission: FCC 47 CFR Part 15, Radiated Field Strength Class B CISPR 22 EN 55022 Class B
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Technical Data Technical Data Absolute Maximum Ratings Parameter Data Input Voltage Differential Data Input Voltage Swing Storage Ambient Temperature Operating Case Temperature1) Storage Relative Humidity Operating Relative Humidity Supply Voltage Data Output Current Receiver Optical Input Power
1)
Symbol
Limit Values min. max.
Unit V V C C % % V mA dBm
VID max VIDpk-pk TS TC
RHs RHo
VCC+0.5
5 -40 -40 5 5 85 85 95 85 4 50 3
VCC max Idata
RxP max
Operating case temperature measured at transceiver reference point (in cage through 2nd centre hole from rear, see Figure 10).
Exceeding any one of these values may permanently destroy the device.
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Technical Data Electrical Characteristics (VCC = 2.97 V to 3.63 V, TC = -40C to 85C) Parameter Common Supply Voltage In-rush Current1) Power Dissipation Transmitter Differential Data Input Voltage Swing2) Tx Disable Voltage Tx Enable Voltage Tx Fault High Voltage Tx Fault Low Voltage Reset Threshold 3) Reset Time Out 3) Supply Current4) Receiver Differential Data Output Voltage VODpk-pk 370 Swing 5) LOS Active LOS Normal Jitter Generation (pk-pk) Jitter Generation (rms) Rise Time6) Fall Time6) Supply Current 4)
1)
Symbol min.
Values typ. 3.3 max. 3.63 30 1 500 2 3200
Unit
VCC-VEE IIR max P VIDpk-pk
TxDis TxEn TxFH TxFL
2.97
V mA W mV V V V V V ms mA mV V V UI UI ps ps mVpp mA
VCC
0.8
VEE
2.4
VCC
0.5 2.75 240 2.85 300 150 1000
VEE
2.5 140
VTH tRES ITx
LOSA LOSN Jpk-pk Rx Jrms Rx
2.4
VCC
0.5 0.07 0.007 180 180 100 130
VEE
tR-Rx tF-Rx
8)
Power Supply Noise Rejection7) PSNR
IRx
2) 3) 4) 5)
6)
Measured with MSA recommended supply filter network (Figure 7). Maximum value above that of the steady state value. Internally AC coupled. Typical 100 differential input impedance. Laser power is shut down if power supply is below VTH and switched on if power supply is above VTH after tRES. MSA defines maximum current at 300 mA. Internally AC coupled. Load 50 to GND or 100 differential. For dynamic measurement a tolerance of 50 mV should be added. Measured values are 20% - 80%.
Preliminary Product Information
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Technical Data
7)
8)
Measured using a 20 Hz to 1 MHz sinusoidal modulation with the MSA recommended power supply filter network (Figure 7) in place. A change in sensitivity of less than 1 dB can be typically expected. Supply current excluding Rx output load.
Preliminary Product Information
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Technical Data Optical Characteristics (VCC = 2.97 V to 3.63 V, TC = -40C to 85C) Parameter Transmitter Launched Power (Average)1) Extinction Ratio (Dynamic) Center Wavelength Spectral Width (-20 dB) Side Mode Suppression Ratio Relative Intensity Noise Optical Eye Mask2) Jitter Generation (pk-pk)3) Jitter Generation (rms)3) Rise Time4) Fall Time4) Receiver5) Saturation (Average Power)6) Sensitivity (Average Power)6) 7) @ 2.67 Gbit/s @ 2.488 Gbit/s @ 1.25 Gbit/s @ 622 Mbit/s @ 155 Mbit/s LOS Assert Level 8) LOS Deassert Level8) LOS Hysteresis8) Input Center Wavelength Reflectance9) Path Penalty
9)
Symbol min.
Values typ. max. 0 1320 1 30 -120 -45 According to standards 0.04 0.002 0.05 0.005 160 160 0 -22 -22 -23 -24 -25 -20 -20 -20 -20 -20
Unit
PO
ER C I SMSR RIN
-5 8.2 1300
dBm dB nm nm dB dB/Hz dBm UI UI ps ps dBm dBm
Tx Disable Laser Output Power PO-TxDis Jpk-pk Tx Jrms Tx
tR-Tx tF-Tx PSAT PIN
PLOSA PLOSD PLOSA
-PLOSD C RxREF RxPEN
-37 -21 0.5 1260 -33 2.5 1580 -27 1
dBm dBm dB nm dB dB
Preliminary Product Information
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Technical Data
1) 2)
3)
4) 5) 6)
7) 8) 9)
Into single mode fiber, 9 m diameter. Transmitter eye is according to ITU-T G.957 S-16.1 and SONET OC-48 IR-1. Measured with 10% eye mask margin. The transceiver is specified to meet the SONET/SDH Jitter performance as outlined in ITU-T G.958 and Telcordia GR-253. Jitter Generation is defined as the amount of jitter that is generated by the transceiver. The Jitter Generation specifications are referenced to the optical OC-48 signals. If no or minimum jitter is applied to the electrical inputs of the transmitter, then Jitter Generation can simply be defined as the amount of jitter on the Tx optical output. The SONET specifications for Jitter Generation are 0.01 UI rms, maximum and 0.1 UI pk-pk, maximum. Both are measured with a 12 kHz - 20 MHz filter in line. A UI is a Unit Interval, which is equivalent to one bit slot. At OC-48, the bit slot is 400 ps, so the Jitter Generation specification translates to 4 ps rms, max. and 40 ps pk-pk, max. Values are 20%- 80%, unfiltered and measured at nominal data rate. Receiver characteristics are measured with a worst case reference laser. Measured with 8.2 dB extinction ratio and a 223-1 NRZ PRBS as recommended by ANSI T1E1.2, SONET OC-48, and ITU-T G.957 I-16. Minimum average optical power at which the BER is less than 1x10-10. See Figure 3. SONET OC-48 and ITU-T G.957 I-16 standards.
1 LOS Level 0 LOS Assert (Minimum) Hysteresis (Minimum) LOS Deassert (Maximum)
LOS deassertion range
LOS persistence
LOS assertion range
LOS / Hysteresis (Typical)
Received Optical Power Level [dBm]
File: 1522
Figure 3
Preliminary Product Information
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Technical Data Timing of Control and Status I/O Parameter Tx Disable Assert Time Symbol t_off Values min. max. 10 s Time from rising edge of Tx Disable to when the optical output falls below 10% of nominal Time from falling edge of Tx Disable to when the modulated optical output rises above 90% of nominal From power on or negation of Tx Fault using Tx Disable Time from fault to Tx Fault on Time Tx Disable must be held high to reset Tx Fault Time from LOS state to Rx LOS assert Time from non-LOS state to Rx LOS deassert Unit Condition
Tx Disable Negate Time
t_on
1
ms
Time to Initialize, t_init Including Reset of Tx Fault Tx Fault Assert Time Tx Disable to Reset t_fault t_reset 10
300
ms
100
s s
LOS Assert Time t_loss_on LOS Deassert Time t_loss_off
100 100
s s
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Technical Data I/O Timing of Soft Control and Status Functions Parameter Tx Disable assert time Symbol t_off Max. Value 100 Unit ms Condition Time from Tx Disable bit set1) until optical output falls below 10% of nominal Time from Tx Disable bit cleared until optical output rises above 90% of nominal Time from power on or negation of Tx Fault using Tx Disable until transmitter output is stable2) Time from fault to Tx Fault bit set Time from LOS state to Rx LOS bit set Time from non-LOS state to Rx LOS bit cleared Time from change of state of Rate Select bit1) until receiver bandwidth is in conformance with appropriate specification N/A From power on to data ready, bit 0 of byte 110 set Time from power on until module is ready for data transmission
Tx Disable deassert t_on time Time to initialize, including reset of Tx Fault t_init
100
ms
300
ms
Tx Fault assert time t_fault LOS assert time LOS deassert time Rate select change time t_loss_on t_loss_off t_rate_sel
100 100 100 100
ms ms ms ms
Serial ID clock rate3) f_serial_clock Analog parameter data ready t_data
400 1000 300
kHz ms ms
Serial bus hardware t_serial ready
1) 2) 3)
Measured from falling clock edge after stop bit of write transaction. See Gigabit Interface Converter (GBIC). SFF-0053, Rev. 5.5, September 27, 2000. The maximum clock rate of the serial interface is defined by the I2C bus interface standard.
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Eye Safety Eye Safety This laser based single mode transceiver is a Class 1 product. It complies with IEC 60825-1 and FDA 21 CFR 1040.10 and 1040.11 except for deviations pursuant to Laser Notice 50, dated July 26, 2001. To meet laser safety requirements the transceiver shall be operated within the Absolute Maximum Ratings. Attention: All adjustments have been made at the factory prior to shipment of the devices. No maintenance or alteration to the device is required. Tampering with or modifying the performance of the device will result in voided product warranty. Note: Failure to adhere to the above restrictions could result in a modification that is considered an act of "manufacturing", and will require, under law, recertification of the modified product with the U.S. Food and Drug Administration (ref. 21 CFR 1040.10 (i)).
Laser Data Wavelength Accessible Emission Limit (as defined by IEC: 7 mm aperture at 14 mm distance) 1310 nm 15.6 mW
FDA
Complies with 21 CFR 1040.10 and 1040.11
IEC
Class 1 Laser Product
File: 1401
Figure 4
Required Labels
Indication of laser aperture and beam
20 Tx
Top view
Rx 11
File: 1333
Figure 5
Laser Emission
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Application Notes Application Notes EMI Recommendations To avoid electromagnetic radiation exceeding the required limits set by the standards, please take note of the following recommendations. When Gigabit switching components are found on a PCB (e.g. multiplexer, serializer-deserializer, clock data recovery, etc.), any opening of the chassis may leak radiation; this may also occur at chassis slots other than that of the device itself. Thus every mechanical opening or aperture should be as small as feasible and its length carefully considered. On the board itself, every data connection should be an impedance matched line (e.g. strip line or coplanar strip line). Data (D) and Data-not (Dn) should be routed symmetrically. Vias should be avoided. Where internal termination inside an IC or a transceiver is not present, a line terminating resistor must be provided. The decision of how best to establish a ground depends on many boundary conditions. This decision may turn out to be critical for achieving lowest EMI performance. At RF frequencies the ground plane will always carry some amount of RF noise. Thus the ground and VCC planes are often major radiators inside an enclosure. As a general rule, for small systems such as PCI cards placed inside poorly shielded enclosures, the common ground scheme has often proven to be most effective in reducing RF emissions. In a common ground scheme, the PCI card becomes more equipotential with the chassis ground. As a result, the overall radiation will decrease. In a common ground scheme, it is strongly recommended to provide a proper contact between signal ground and chassis ground at every location where possible. This concept is designed to avoid hotspots which are places of highest radiation, caused when only a few connections between chassis and signal grounds exist. Compensation currents would concentrate at these connections, causing radiation. However, as signal ground may be the main cause for parasitic radiation, connecting chassis ground and signal ground at the wrong place may result in enhanced RF emissions. For example, connecting chassis ground and signal ground at a front panel/bezel/chassis by means of a fiber optic transceiver/cage may result in a large amount of radiation especially where combined with an inadequate number of grounding points between signal ground and chassis ground. Thus the transceiver becomes a single contact point increasing radiation emissions. Even a capacitive coupling between signal ground and chassis ground may be harmful if it is too close to an opening or an aperture. For a number of systems, enforcing a strict separation of signal ground from chassis ground may be advantageous, providing the housing does not present any slots or other discontinuities. This separate ground concept seems to be more suitable in large systems where appropriate shielding measures have also been implemented. The return path of RF current must also be considered. Thus a split ground plane between Tx and Rx paths may result in severe EMI problems.
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Application Notes The bezel opening for a transceiver should be sized so that all contact springs of the transceiver cage make good electrical contact with the face plate. Please consider that the PCB may behave like a dielectric waveguide. With a dielectric constant of 4, the wavelength of the harmonics inside the PCB will be half of that in free space. Thus even the smallest PCBs may have unexpected resonances. Large systems can have many openings in the front panel for SFP transceivers. In typical applications, not all of these ports will hold transceivers; some may be intentionally left empty. These empty slots may emit significant amounts of radiation. Thus it is recommended that empty ports be plugged with an EMI plug as shown in Figure 6. Infineon offers an EMI/dust plug, P/N V23818-S5-B1. SFP Accessories Cage: Infineon Technologies Part Number: V23838-S5-N1/V23838-S5-N1-BB Cage EMI/Dust Plug: Infineon Technologies Part Number: V23818-S5-B1 Host Board Connector: Tyco Electronics Part Number: 1367073-1 Cage Dust Plug: Infineon Technologies Part Number: V23818-S5-B2
CAGE
CAGE EMI/DUST PLUG
HOST BOARD CONNECTOR
iSFPTM
DUST PLUG
HOST BOARD
File: 1521
Figure 6
Preliminary Product Information
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Application Notes EEPROM Serial ID Memory Contents (A0h)
Addr. Hex ASCII Name/Description 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 03 04 07 00 12 00 00 00 00 00 00 05 19 00 0F 96 00 00 00 00 49 6E 66 69 6E 65 6F 6E 20 41 47 20 I n f i n e o n A G Identifier Extended identifier Connector Transceiver optical compatibility Addr. Hex ASCII Name/Description 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 20 20 20 20 00 00 03 19 56 32 33 38 34 38 2D 4E 31 35 2D 43 36 35 36 20 30 31 2E 30 05 1E 00 CA Reserved Vendor OUI Vendor name
Encoding BR, nominal Reserved Length (9 m) - km Length (9 m) Length (50 m) Length (62.5 m) Length (copper) Reserved Vendor name
V 2 3 8 4 8 N 1 5 C 6 5 6 0 1 . 0
Vendor part number
Vendor revision, product status dependent Wavelength Reserved Check sum of bytes 0 - 62
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Application Notes
Addr. Hex ASCII Name/Description 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 00 1A 6B 06 Transceiver signal options BR, maximum BR, minimum Vendor serial number Addr. Hex ASCII Name/Description 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 255 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 Vendor specific. Reserved for future use.
2004-01-09
Vendor specific EEPROM
Vendor manufacturing date code
68 B0 01
Diagnostic monitoring type Enhanced options SFF-8472 compliance Check sum of bytes 64 - 94
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Application Notes Digital Diagnostic Monitoring Interface - Intelligent Alarm and Warning Thresholds (2-Wire Address A2h) Address 00 - 01 02 - 03 04 - 05 06 - 07 08 - 09 10 - 11 12 - 13 14 - 15 16 - 17 18 - 19 20 - 21 22 - 23 24 - 25 26 - 27 28 - 29 30 - 31 32 - 33 34 - 35 36 - 37 38 - 39 40 - 55
1)
# Bytes 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 16
Name Temp High Alarm Temp Low Alarm Temp High Warning Temp Low Warning Voltage High Alarm Voltage Low Alarm Voltage High Warning Voltage Low Warning Bias High Alarm Bias Low Alarm Bias High Warning Bias Low Warning Tx Power High Alarm Tx Power Low Alarm Tx Power High Warning Tx Power Low Warning Rx Power High Alarm Rx Power Low Alarm Rx Power High Warning Rx Power Low Warning Reserved
Description MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address Reserved for future monitored quantities
Value 95C1) -40C 90C1) -35C 3.7 V 2.95 V 3.63 V 2.97 V 70 mA 4 mA 60 mA 5 mA 1 dBm -6 dBm 0 dBm -5 dBm 1 dBm -22 dBm 0 dBm -20 dBm
A delta exists between actual transceiver temperature and value shown as measurement is taken internal to an IC located on the underside of the iSFPTM PCB.
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Application Notes Calibration Constants for External Calibration Option (2-Wire Address A2h) Address 56 - 59 60 - 63 64 - 67 68 - 71 72 - 75 76 - 77 78 - 79 # Bytes 4 4 4 4 4 2 2 Name Rx_PWR (4) Rx_PWR (3) Rx_PWR (2) Rx_PWR (1) Rx_PWR (0) Tx_I (Slope) Tx_I (Offset) Description Value Single precision floating point 0 calibration data, Rx optical power. 0 0 1 0 Fixed decimal (unsigned) 1 calibration data, laser bias current. Fixed decimal (signed two's complement) calibration data, laser bias current. Fixed decimal (unsigned) calibration data, transmitter coupled output power. 0
80 - 81
2
Tx_PWR (Slope)
1
82 - 83
2
Tx_PWR (Offset) Fixed decimal (signed two's 0 complement) calibration data, transmitter coupled output power. T (Slope) Fixed decimal (unsigned) calibration data, internal module temperature. Fixed decimal (signed two's complement) calibration data, internal module temperature. Fixed decimal (unsigned) calibration data, internal module supply voltage. Fixed decimal (signed two's complement) calibration data, internal module supply voltage. Reserved Byte 95 contains the low order 8 bits of the sum of bytes 0 - 94. 1
84 - 85
2
86 - 87
2
T (Offset)
0
88 - 89
2
V (Slope)
1
90 - 91
2
V (Offset)
0
92 - 94 95
3 1
Reserved Check sum
Preliminary Product Information
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Application Notes A/D Values and Status Bits (2-Wire Address A2h) Byte 96 97 98 99 100 101 102 103 104 105 106 107 108 109 Bit All All All All All All All All All All All All All All Name Temperature MSB Temperature LSB VCC MSB VCC LSB Tx Bias MSB Tx Bias LSB Tx Power MSB Tx Power LSB Rx Power MSB Rx Power LSB Reserved MSB Reserved LSB Reserved MSB Reserved LSB Reserved for 1st future definition of digitized analog input Reserved for 1st future definition of digitized analog input Reserved for 2nd future definition of digitized analog input Reserved for 2nd future definition of digitized analog input Digital state of the Tx Disable Input Pin Read/write bit that allows software disable of laser. Writing 1 disables laser. Not implemented. Digital state of the SFP Rx Rate Select Input Pin Measured Rx input power5) Measured Tx output power4) Internally measured Tx Bias Current3) Internally measured supply voltage in transceiver2) Description Internally measured module temperature1) Converted analog values. Calibrated 16 bit data.
Optional Status/Control Bits 110 110 7 6 Tx Disable State Soft Tx Disable
110 110
5 4
Reserved Rx Rate Select State
Preliminary Product Information
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Application Notes A/D Values and Status Bits (2-Wire Address A2h) (cont'd) Byte 110 Bit 3 Name Soft Rx Rate Select Description Read/write bit that allows software Rx rate select. Writing 1 selects full bandwidth operation. Not implemented. Digital state of the Tx Fault Output Pin Digital state of the LOS Output Pin Indicates transceiver has achieved power up and data is ready Reserved
110 110 110 111
1)
2 1 0 7-0
Tx Fault LOS Data_Ready_Bar Reserved
2) 3) 4) 5)
Temperature measurement is performed on an IC located on the underside of the iSFPTM PCB. The accuracy is 3C. The Tx voltage VCCT is monitored, with accuracy of 3%. The accuracy of bias current measurement is 10%. The accuracy of the Tx optical power measurement is 1.5 dB. The accuracy of the Rx optical power measurement is 2 dB.
Preliminary Product Information
23
2004-01-09
V23848-N15-C656
Application Notes Alarm and Warning Flags (2-Wire Address A2h) Byte 112 112 112 112 112 112 112 112 113 113 113 113 113 113 113 113 114 115 116 116 116 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 All All 7 6 5 Name Temp High Alarm Temp Low Alarm VCC High Alarm VCC Low Alarm Tx Bias High Alarm Tx Bias Low Alarm Tx Power High Alarm Tx Power Low Alarm Rx Power High Alarm Rx Power Low Alarm Reserved Alarm Reserved Alarm Reserved Alarm Reserved Alarm Reserved Alarm Reserved Alarm Reserved Reserved Temp High Warning Temp Low Warning VCC High Warning Set when internal temperature exceeds high warning level Set when internal temperature is below low warning level Set when internal supply voltage exceeds high warning level
24 2004-01-09
Description Set when internal temperature exceeds high alarm level Set when internal temperature is below low alarm level Set when internal supply voltage exceeds high alarm level Set when internal supply voltage is below low alarm level Set when Tx Bias current exceeds high alarm level Set when Tx Bias current is below low alarm level Set when Tx output power exceeds high alarm level Set when Tx output power is below low alarm level Set when received power exceeds high alarm level Set when received power is below low alarm level
Preliminary Product Information
V23848-N15-C656
Application Notes Alarm and Warning Flags (2-Wire Address A2h) (cont'd) Byte 116 116 116 116 116 117 117 117 117 117 117 117 117 118 119 Bit 4 3 2 1 0 7 6 5 4 3 2 1 0 All All Name VCC Low Warning Tx Bias High Warning Tx Bias Low Warning Tx Power High Warning Tx Power Low Warning Rx Power High Warning Rx Power Low Warning Reserved Warning Reserved Warning Reserved Warning Reserved Warning Reserved Warning Reserved Warning Reserved Reserved Description Set when internal supply voltage is below low warning level Set when Tx bias current exceeds high warning level Set when Tx bias current is below low warning level Set when Tx output power exceeds high warning level Set when Tx output power is below low warning level Set when received power exceeds high warning level Set when received power is below low warning level
Vendor Specific Memory Addresses (2-Wire Address A2h) Address 120 -127 # Bytes 8 Name Vendor Specific Description Vendor specific
User EEPROM (2-Wire Address A2h) Address # Bytes Name User EEPROM Vendor Specific Description User writable EEPROM Vendor specific control functions 128 - 247 120 248 - 255 8
Preliminary Product Information
25
2004-01-09
V23848-N15-C656
Application Notes Single Mode 1300 nm iSFPTM Transceiver, AC/AC TTL
1 H
VCCT
xx 1) 0.1 F
VEET
1 H
1) Design criterion of the capacitor used is the resonant frequency and its value must be in the order of the nominal data rate. Use of single layer capacitors recommended. Short trace lengths are mandatory.
3.3 V
VCCR
xx 1) 0.1 F 10 F 0.1 F 10 F
VEER
iSFPTM Module
Host Board
File: 1304
Figure 7
Recommended Host Board Supply Filtering Network
3.3 V
1 H
Infineon iSFPTM Transceiver
16
xx 1) 0.1 F
Protocol VCC Protocol VCC
4.7 to 10 k
10 F
0.1 F
1 H
VCCT 17
4.7 to 10 k
Tx Disable Tx Fault
Tx Disable Tx Fault TD-
0.01 F
100
Laser Driver
TD+ VEET 15
0.01 F
Protocol IC
SerDes IC
4.7 to 10 k
xx 1) 10 F 0.1 F
VCCR 14
RD+
100
0.01 F
RD- LOS 3.3 V VEER
4.7 to 10 k 4.7 to 10 k 4.7 to 10 k
0.01 F
Preamp & Quantizer
LOS
PLD / PAL
MOD-DEF(0)
MOD-DEF(1)
MOD-DEF(2)
1) Design criterion of the capacitor used is the resonant frequency and its value must be in the order of the nominal data rate. Use of single layer capacitors recommended. Short trace lengths are mandatory.
File: 1303
Figure 8
Example iSFPTM Host Board Schematic
26 2004-01-09
Preliminary Product Information
V23848-N15-C656
Package Outlines Package Outlines
13.7
6.25
56.5 47.5
11.6
10.3
13.7
Dimensions in mm
1.34
File: 1215
Figure 9
29.80
TRANSCEIVER TEMPERATURE REFERENCE POINT
Dimensions in mm
File: 1224
Figure 10
Preliminary Product Information
27
2004-01-09
8.5
13.4
V23848-N15-C656 Revision History: Previous Version: Page 6, 8 to 25 12 16 17 27 2004-01-09 2003-04-09 DS3
Subjects (major changes since last revision) iSFPTM trademark added Tables revised/added Figure 3 added EMI Recommendations changed SFP Accessories changed Figure 10 added
Edition 2004-01-09 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 Munchen, Germany
(c) Infineon Technologies AG 2004.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.


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